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Data Sheet

FULL DATA SHEET (PDF, 1.9MB) Download   E-Mail

Errata

Errata DS26528 26528A1.pdf  Errata DS26528 26528A2.pdf  Errata DS26528 26528A3.pdf  Errata DS26528 26528A4.pdf

Application Notes

Application Note 301: Legacy T1/E1 8MHz Backplane Operation - DS26528 Application Note 309: Interfacing to the Fractional T1 and E1 - DS26528 Application Note 351: T1/E1 and T3/E3 Transformer Selection Guide - DS26528 Application Note 390: DS31256 and T1/E1 Interface - DS26528 Application Note 561: Tech Brief 7: DS2152 and DS2154 8MHz System Clock Operation - DS26528 Application Note 3208: Elastic Store Operation - DS26528 Application Note 3345: Examples of DS31256 Applications - DS26528 Application Note 3610: DS21458 Quad and DS26528 Octal Transceiver Software Comparison - DS26528 Application Note 3686: DS2155 and DS26521 Software Comparison - DS26528 Application Note 3718: DS26528 and DS26524 Transmit Pulse Control - DS26528 Application Note 3827: Initialization and Configuration of the DS26528 Transceiver - DS26528 Application Note 3968: How to Use the Bit-Error-Rate Tester (BERT) on the DS2652x STCs - DS26528

Evaluation Kits

none

Design Guides

Communications (PDF)

Reliability Reports

Reliability Report: DS26528.pdf

Software/Models

DS26528LBGA A3 BSDL Model DS26528CSBGA A4 BSDL Model DS26528CSBGA A3 BSDL Model DS26528 Cadence Concept Symbol DS26528 Cadence Allegro Symbol DS26528 Logical Symbol-XML Format DS26528LBGA A2 BSDL Model DS26528CSBGA A2 BSDL Model DS26528 IBIS Model DS26528LBGA A4 BSDL Model

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