The MAX5881 12-bit, 4.3Gsps digital-to-analog converter
(DAC) is optimized for direct RF synthesis of multichannel
downstream quadrature amplitude modulation
(QAM) signals in cable modem termination systems
(CMTS) and edge QAM (EQAM) devices. The MAX5881
provides excellent spurious, noise, and adjacent channel
power (ACP) performance and can directly synthesize
multiple channels in the 50MHz to 1000MHz cable
downstream band, as defined by the Data-Over-Cable
Service Interface Specification (DOCSIS®).
The MAX5881 includes four 12-bit multiplexed low-voltage
differential signaling (LVDS) input ports, each operating
up to 1075MHz in double data rate (DDR) or quad
data rate (QDR) mode. The device accepts a clock at
1/2 the DAC update rate, as conversion is triggered on
both rising and falling clock edges. The input data rate
is 1/4 the DAC update rate or 1/2 the clock rate. The
MAX5881 is capable of operating with a clock rate of
up to 2.15GHz, resulting in a DAC update rate of
4.3Gsps. The MAX5881 provides an LVDS data clock
output to simplify interfacing to FPGA or ASIC devices.
The MAX5881 is a current-steering DAC with an integrated,
self-calibrated 50Ω differential output termination
to ensure optimum dynamic performance. The
MAX5881 operates from 3.3V and 1.8V power supplies
and consumes 1.3W at 4.3Gsps. The device is specified
over the commercial temperature range (0°C to
+70°C) and is available in an 11mm x 11mm, 169
CSBGA lead-free (RoHS-compliant) package.
Key Features
Applications/Uses
4.3Gsps Output Update Rate
Direct RF Synthesis from 50MHz to 1000MHz
Performance Supports Up to Four Contiguous QAM Channels
